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compact, precision, six degrees of freedom inertial sensor data sheet ADIS16460 rev. 0 document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is as sumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 ? 2016 analog devices, inc. all rights reserved. technical support www.analog.com features triaxial digital gyroscope measurement range: 100 /sec (minimum) 8 /hr (typical) in - run bias stability 0.1 2 /hr (typical) angle random walk , x - axis triaxial digital accelerometer, 5 g dynamic range autonomous operation and data collection no external configuration commands required fast start - up time factory calibrated sensitivity, bias, and axial alignment calibration t emperature range: 0c t a 70c serial peripheral interface ( spi ) data communications data ready signal for synchronizing data acquisition embedded temperature sensor programmable operation and control automatic and manual bias correction controls bartlett window finite impulse response ( fir ) filter, variable number of taps external clock : input and output options pps /video input with a counter for relative time stamping single command self test single - supply operation: 3. 15 v to 3. 45 v 2000 g shock survivability operating temperature ran ge: ?25c to +85c applications smart a griculture/ c onstruction m achinery unmanned aerial vehicles ( uavs ) / d rones, and n avigation and p ayload s tabilization robotics factory/ i ndustrial a utomation p ersonnel/ asset tr acking general description the adis1646 0 i sensor ? device i s a complete inertial system that include s a triaxial gyroscope and a triaxial accelerometer . each sensor in the ADIS16460 c ombines industry leading i mems? technology with signal conditioning that optimizes dynamic performance. the factory calibration characterizes eac h sensor for sensitivity, bias , and alignment . as a result, each sensor has its own dynamic compensation formulas that provide accurate sensor measurements. the ADIS16460 provide s a simple, cost effective method for integratin g accurate, multiaxis inertial sensing into industrial systems, especially when compared with the complexity and investment associated with discrete designs. all necessary motion testing and calibration are part of the production process at the factor y, gr eatly reducing system integration time. tight orthogonal alignment simplifies inertial frame alignment in navigation systems. the spi and register structure s provide a simple interface for data collection and configuration control. the ADIS16460 is in a n aluminum module package that is approximately 2 2. 4 mm 2 2. 4 mm 9 mm and has a 14 - pin connector interface. functional block dia gram controller clock triaxial gyroscope triaxial accelerometer power management cs sclk din dout gnd vdd temperature dr sync rst spi self test i/o alarms output data registers user control registers calibration and filters ADIS16460 13390-001 figure 1.
ADIS16460 data sheet rev. 0 | page 2 of 26 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing specifications .................................................................. 5 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 theory of operation ...................................................................... 10 reading sensor data .................................................................. 10 device configuration ................................................................ 11 user registers .................................................................................. 12 output data registers .................................................................... 13 rotation ....................................................................................... 13 accelerometers ............................................................................ 15 internal temperature ................................................................. 17 product identification ................................................................ 17 status/error flags ....................................................................... 17 system functions ............................................................................ 19 global commands ..................................................................... 19 software reset ............................................................................. 19 flash memory test ..................................................................... 19 manual flash update ................................................................. 19 automated self test ................................................................... 19 input/output configuration ..................................................... 19 data ready (dr) pin configuration ....................................... 19 sync pin configuration .......................................................... 20 digital processing configuration ................................................. 21 gyroscopes/accelerome ters ..................................................... 21 calibration ....................................................................................... 22 gyroscopes .................................................................................. 22 accelerometers ........................................................................... 22 restoring factory calibration .................................................. 23 applications information .............................................................. 24 mounting tips ............................................................................ 24 power supply considerations ................................................... 24 breakout board ........................................................................... 24 pc - based evaluation tools ....................................................... 25 outline dimensions ....................................................................... 26 ordering guide .......................................................................... 26 revision history 1/16 revision 0 : initial version
data sheet ADIS16460 rev. 0 | page 3 of 26 specifications t a = 2 5c, v dd = 3.3 v, angular rate = 0/s ec, 1 g , msc_ctrl = 0x00 c 1 , unless otherwise noted. table 1 . parameter test conditions /comments min typ max unit gyroscopes dynamic range 1 00 /sec initial sensitivity 16- bit data format 1 0.005 /sec/lsb 32- bit data format 1 7.63 10 ? 8 /sec/lsb repeatability 2 0c t a 70c 1 % sensitivity temperature coefficient 0c t a 70c 20 ppm/c misalignment axis to axis 0 .15 degrees axis to frame (package) 1 degrees nonlinearity best fit straight line 0.5 % of fs bias repeatability 2 , 3 0c t a 70c, 1 /sec in - run bias stability 1 8 /hr ang l e random walk 1 , x - axis 0.12 /hr 1 , y - axis, z - axis 0.17 /hr bias temperature coefficient 0c t a 70c 0.007 /sec/c linear acceleration effect on bias any axis, 1 0.01 /sec/ g vibration rectification error 20 hz to 2000 hz, 5 g rms 0.0004 /sec /g 2 bias supply sensitivity 3.15 v vdd 3.45 v 0.037 /sec/v output noise no filtering 0.075 /sec rms rate noise density 10 hz to 40 hz, no filtering 0.004 /sec/hz rms ?3 db bandwidth 375 hz sensor resonant frequency 28 khz accelerometers each axis dynamic range 5 g initial sensitivity 16- bit data format 4 0.25 m g /lsb 32- bit data format 4 3.81 10 ?6 m g /lsb repeatability 2 0c t a 70c 1 % sensitivity temperature coefficient 0c t a 70c 15 ppm/c misalignment axis to axis 0.05 degrees axis to frame (package) 1 degrees nonlinearity best fit straight line 0.1 % of fs bias repeatability 2 , 3 0c t a +70c, 1 15 m g in - run bias stability 1 0.2 m g velocity random walk 1 0.0025 m/sec/hr bias temperature coefficient 0c t a 70c 0.05 m g /c vibration rectification error 20 hz to 2000 hz, 1 g rms 0.08 m g/g 2 bias supply sensitivity 3.15 v vdd 3.45 v 72 m g /v output noise no filtering 4.5 m g rms noise density 10 hz to 40 hz, no filtering 0.2 m g /hz rms ?3 db bandwidth 350 hz sensor resonant frequency 5.5 khz temperature sensitivity see table 37 0.05 c/lsb logic inputs 5 input high voltage, v ih 2.0 v input low voltage, v il 0.8 v logic 1 input current, i ih v ih = 3.3 v 0.2 10 a
ADIS16460 data sheet rev. 0 | page 4 of 26 parameter test conditions /comments min typ max unit logic 0 input current, i il v il = 0 v all pins except rst 40 60 a rst pin 1 ma input capacitance, c in 10 pf digital outputs 5 output high voltage, v oh i source = 1.6 ma 2.4 v output low voltage, v ol i sink = 1.6 ma 0.4 v flash memory endurance 6 10,000 cycles data retention 7 t j = 85c 20 years functional times 8 time until new data is available power - on start - up time 290 ms reset recovery time 9 , 10 2 22 ms reset initiation time 11 10 s conversion rate x_gyro_out, x_accl_out 2048 sps clock accuracy 3 % sync input clock 12 msc_ctrl[3:2] = 01 0.8 2000 hz pps input clock msc_ctrl[3:2] = 10 128 hz power supply operating voltage range, vdd 3.15 3.3 3.45 v power supply current vdd = 3.15 v 44 55 ma 1 the x_gyro_low (see table 10 ), y_gyro_low (see table 12 ), and z_gyro_low (see table 14 ) registers capture the bit growth associated with the user configurable filters. 2 the repeatability specifications represent analytical projections, which are based on the following drift contributions and conditions: temperature hysteresis (0c to 70c), electronics drift (high temperature ope rating life test: 85 c, 500 hours), drift from temperature cycling (jesd22, method a104 - c, method n, 500 cycles, ? 40c to +85c), rate random walk ( 10 year projection), and broadband noise . 3 bias repeatability describes a long - term behavior, over a variety of conditions. short - term repeatability is related to the in - run bias stability and noise density specifications. 4 the x_accl_low (see table 24 ), y_accl_low (see table 26 ), and z_accl_low (see table 2 8 ) registers capture the bit growth associated with the user configurable filters. 5 the digital i/o signals are driven by an internal 3.3 v supply , and the inputs are 5 v tolerant. 6 endur ance is qualified as per jedec standard 22 , method a117 , and measured at ? 40c , +25 c , +85 c, and +125 c . 7 the data r etention lifetime equivalent is at a junction temperature (t j ) of 8 5 c as per jedec s tandard 22, method a117. data r etention lifetime decreases with junction temperature. 8 these times do not include thermal settling and internal filter response times (375 hz bandwidth), which may affect overall a ccuracy. 9 th e parameter assumes that a full start - up sequence has taken place, prior to ini tiation of the reset cycle. 10 this parameter represents the time between raising the rst line and restoration of pulsing on the dr line, which indicates a return to normal operation. 11 this parameter represents the pulse time on the rst line, which ensures initiation of the reset operation. 12 the sync input clock functions below the specified minimum value but at reduced performance levels.
data sheet ADIS16460 rev. 0 | page 5 of 26 timing specification s t a = 25c, vdd = 3.3 v, unless otherwise noted. table 2 . parameter description normal mode burst read unit min 1 typ max min 1 typ max f sclk serial clock 0. 1 2.0 0. 1 1.0 mhz t stall stall period between data 16 n/a 2 s t readrate read rate 24 s t cs chip select to sclk edge 200 200 ns t dav dout valid after sclk edge 25 25 ns t dsu din setup time before sclk rising edge 25 25 ns t dhd din hold time after sclk rising edge 50 50 ns t sclkr , t sclkf sclk rise/fall times 5 12.5 5 12.5 ns t dr , t df dout rise/fall times 5 12.5 5 12.5 ns t sfs cs high after sclk edge 0 0 ns t 1 input sync positive pulse width 25 25 s t s t dr input sync to data ready valid transition 636 636 s t nv data in valid time 210 210 s t 2 input sync period 500 500 s 1 guaranteed by design and characterization, but not tested in production . 2 when using the burst read mode, the stall period is not applicable. timing diagrams cs sclk dout din 1 2 3 4 5 6 15 16 r/w a5 a6 a4 a3 a2 dc2 msb d14 dc1 lsb d13 d12 d10 d1 1 d2 lsb d1 t cs t sfs t da v t dhd t dsu t sclkr t dr t df t sclkf 13390-002 figure 2 . spi timing and sequence cs sclk t readr a te t s t al l 13390-003 figure 3 . stall time and data rate clock data ready t 1 t 2 t nv t stdr 13390-004 figure 4 . input clock timing diagram , msc_ctrl[0] = 1
ADIS16460 data sheet rev. 0 | page 6 of 26 absolute maximum rat ings table 3 . parameter rating acceleration (shock) any axis, unpowered 2000 g any axis, powered 2000 g vdd to gnd ?0.3 v to + 3. 45 v digital input voltage to gnd ?0.3 v to + 5.3 v digital output voltage to gnd ?0.3 v to + vdd + 0.3 v temperature operating range ? 2 5 c to + 8 5 c storage range ?65c to +125c 1, 2 1 extended exposure to temperatures outside the specified temperature range of ? 2 5 c to + 8 5c can adversely affect the accuracy of the factory calibration. for best accuracy, store the parts within the specified operating range of ? 2 5 c to + 8 5c. 2 althoug h the device is capable of withstanding short - term exposure to 150c, long - term exposure threatens internal mechanical integrity. stresses at or above those listed under absolute maximum ratings may cause permanent damage to the product. this is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. operation beyond the maximum operating conditions for extended periods may affect produ ct reliability. table 4 . package characteristics package type ja (c/w) jc (c/w) mass (grams) 14- lead module 36.5 16.9 15 esd caution
data sheet ADIS16460 rev. 0 | page 7 of 26 pin configuration an d function descripti ons sync dout cs rst dnc dnc dnc dr sclk din dnc dnc vdd gnd 13 14 11 12 9 10 7 8 5 6 3 4 1 2 ADIS16460 top view (not to scale) 13390-005 notes 1. this represents the pin assignments when looking down at the connector. see figure 6. 2. mating connector: samtec clm-107-02 series or equivalent. 3. dnc = do not connect. figure 5 . pin configuration pin 1 pin 14 13390-006 figure 6. pin locations table 5 . pin function descriptions pin no. mnemonic type description 1 dr o utput data ready indicator . 2 sync i nput /o utput external sync input/output , per msc_ctrl . s ee table 50. 3 sclk i nput spi serial clock. 4 dout o utput spi data output. this pin c locks the output on the sclk falling edge. 5 din input spi data input. this pin c locks the input on the sclk rising edge. 6 cs input spi chip select. 7 dnc n ot applicable do not connect. do not connect to this pin . 8 rst input reset. 9 dnc not applicable do not connect. do not connect to this pin. 10 dnc not applicable do not connect. do not connect to this pin. 1 1 vdd s upply power supply. 12 dnc not applicable do not connect. do not connect to this pin. 13 gnd supply power ground. 14 dnc not applicable do not connect. do not connect to this pin.
ADIS16460 data sheet rev. 0 | page 8 of 26 typical performance characteristics 100 1 10 0.01 0.1 1 10 100 1k 10k root allan variance (/hr) tau (seconds) 13390-007 mean mean + 1 mean ? 1 figure 7 . gyroscope root allan variance 0.5 ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 ?60 ?40 ?20 0 20 40 60 80 100 gyroscope sensitivity error (% of fs) temperature (c) 13390-100 mean + 1 mean ? 1 mean figure 8 . gyroscope sensitivity error vs. cold to hot temperature sweep 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 ?60 ?40 ?20 0 20 40 60 80 100 gyroscope bias error (/sec) temperature (c) 13390-102 mean + 1 mean ? 1 mean figure 9. gyroscope bias error vs. cold to hot temperature sweep 10 0.01 0.1 1 0.01 0.1 1 10 100 1k 10k root allan variance (m g) tau (seconds) 13390-008 mean mean + 1 mean ? 1 0.5 ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 ?60 ?40 ?20 0 20 40 60 80 100 gyroscope sensitivity error (% of fs) temperature (c) 13390-101 mean + 1 mean ? 1 mean figure 11 . gyroscope sensitivity error vs. hot to cold temperature sweep 2.0 ?2.0 ?1.5 ?1.0 ?0.5 0 0.5 1.0 1.5 ?60 ?40 ?20 0 20 40 60 80 100 gyroscope bias error (/sec) temperature (c) 13390-103 mean + 1 mean ? 1 mean figure 12 . gyroscope bias error vs. hot to cold temperature sweep
data sheet ADIS16460 rev. 0 | page 9 of 26 0.5 ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 ?60 ?40 ?20 0 20 40 60 80 100 accelerometer sensitivity error (% of fs) temperature (c) 13390-104 mean + 1 mean ? 1 mean figure 13 . accelerometer sensitivity error vs. cold to hot temperature sweep 10 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 ?40 ?20 ?60 0 20 40 60 80 100 accelerometer bias error (m g ) temperature (c) 13390-106 mean + 1 mean ? 1 mean figure 14 . accelerometer bias error vs. cold to hot temperature sweep 0.5 ?0.5 ?0.4 ?0.3 ?0.2 ?0.1 0 0.1 0.2 0.3 0.4 ?60 ?40 ?20 0 20 40 60 80 100 accelerometer sensitivity error (% of fs) temperature (c) 13390-105 mean + 1 mean ? 1 mean figure 15 . accelerometer sensitivity error vs. hot to cold temperature sweep 10 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 ?60 ?40 ?20 0 20 40 60 80 100 accelerometer bias error (m g) temperature (c) 13390-107 mean + 1 mean ? 1 mean figure 16 . accelerometer bias error vs. hot to cold temperature sweep
ADIS16460 data sheet rev. 0 | page 10 of 26 theory of operation the ADIS16460 is an autonomous sensor system that requires no user initialization. when it has a n adequate power supply across the vdd and gnd pins , it initializes itself and starts sampling, processing , and loading sensor data into the output registers at a sample rate of 2048 sps. the dr pin ( s ee figure 5 ) pulses high after each sample cycle concludes. the spi interface enables simple integration with many embedded processor platforms , as shown in figure 17 (electrical connection) and table 6 (pin functions ). system processor spi master ADIS16460 sclk cs din dout sclk ss mosi miso +3.3v irq dr vdd i/o lines are com pa tible with 3.3v logic levels 6 3 5 4 1 1 1 13 13390-009 figure 17 . electrical connection diagra m table 6 . generic master processor pin names and function s pin name function ss slave select sclk serial clock mosi master output, slave input miso master input, slave output irq interrupt request the ADIS16460 spi interface supports full duplex serial commu - ni cation (simultaneous transmit and receive) and uses the bit sequence shown in figure 20. table 7 provides a list of the most common settings that require attention to initialize the serial port of a processor for the adis1 6460. table 7 . generic master processor spi settings processor setting description master the ADIS16460 operate s a s a slave sclk rate 1 maximum serial clock rate , see table 2 spi mode 3 cpol = 1 (polarity), cph a = 1 (phase) msb f irst bit sequence , see figure 20 16- bit length shift register/data length 1 for burst read , sclk rate 1 mhz. r ead ing sensor data the ADIS16460 provides two options for acquiring sensor data: a single register and a burst register . a single register read requires two 16 - bit spi cycles . the first cycle requests the contents of a register using the bit assignments in figure 20 . bit dc7 to bit dc0 are dont care s for a read , and then the output register contents follow on dout during the second sequence . figure 18 includes three single register reads in succession . in this example, the process starts with din = 0x0 6 00 to request the contents of x_gyro_out , then follows with 0x0 a 00 to request y_gyro_out , and 0x0 e 00 to request z_gyro_out . full duplex operation enables processors to use the same 16 - bit spi cycle to read data from dout while requesting the next set of data on din . figure 19 provides an example of the four spi signals when reading x_gyro_out in a repeating pattern. x_gyro_out din dout y_gyro_out z_gyro_out 0x0600 0x0a00 0x0e00 13390-010 figure 18 . spi read example sclk cs din dout dout = 1111 1111 1111 1010 = 0xfffa = ?6 lsb = ?0.03/sec din = 0000 0110 0000 0000 = 0x0600 13390-0 1 1 figure 19 . example spi read, second sequence r/w r/w a6 a5 a4 a3 a2 a1 a0 dc7 dc6 dc5 dc4 dc3 dc2 dc1 dc0 d0 d1 d2 d3 d4 d5 d6 d7 d8 d9 d10 d 1 1 d12 d13 d14 d15 cs sclk din dout a 6 a 5 d13 d14 d15 notes 1. the dout bit pa ttern reflects the entire contents of the register identified b y [a6:a0] in the previous 16-bit din sequence when r/w = 0. 2. if r/w = 1 during the previous sequence, dout is not defined. 13390-012 figure 20 . spi communication bit sequence
data sheet ADIS16460 rev. 0 | page 11 of 26 burst read function the burst read function provides a way to read all of the data in one continuous stream of bits, with no stall time in between each 16-bit segment. as shown in figure 21, start this mode by setting din = 0x3e00 while keeping cs low for eight additional 16-bit read cycles. these 10 cycles produce the following sequence of output registers on the dout line: diag_stat, x_gyro_out, y_gyro_out, z_gyro_out, x_accl_out, y_accl_out, z_accl_out, temp_out, smpl_cntr, and checksum. the checksum value provides a way to confirm data integrity, because it comes from the following formula (each byte unsigned in this process). checksum = diag_stat[15:8] + diag_stat[7:0] + x_gyro_out[15:8] + x_gyro_out[7:0] + y_gyro_out[15:8] + y_gyro_out[7:0] + z_gyro_out[15:8] + z_gyro_out[7:0] + x_accl_out[15:8] + x_accl_out[7:0] + y_accl_out[15:8] + y_accl_out[7:0] + z_accl_out[15:8] + z_accl_out[7:0] + temp_out[15:8] + temp_out[7:0] + smpl_cntr[15:8] + smpl_cntr[7:0] glob_cmd cs sclk din dout xgyro_out diag_stat crc-16 13390-013 1231 1 figure 21. burst read sequence spi read test sequence figure 22 provides a test pattern for testing the spi communica- tion. in this pattern, write 0x5600 to the din line in a repeating pattern and raise the chip select for a time that meets the stall time requirement (see table 2) each 16-bit sequence. starting with the second 16-bit sequence, dout produces the contents of the prod_id register, 0x404c (see table 41). dout = 0100 0000 0100 1100 = 0x404c = 16,460 din = 0101 0110 0000 0000 = 0x5600 sclk cs din dout 13390-014 figure 22. spi test read pattern din = 0x5600, dout = 0x404c device configuration the control registers in table 8 provide users with a variety of configuration options. the spi provides access to these registers, one byte at a time, using the bit assignments in figure 20. each register has 16 bits, where bits[7:0] represent the lower address, and bits[15:8] represent the upper address. figure 23 provides an example of writing 0x01 to address 0x3e (glob_cmd[1], using din = 0xbe01). sclk cs din din = 1011 1110 0000 0001 = 0xbe01, writes 0x01 to address 0x3e. 13390-015 figure 23. example spi write sequence dual memory structure writing configuration data to a control register updates its sram contents, which are volatile. after optimizing each relevant control register setting in a system, set glob_cmd[3] = 1 (din = 0xbe08) to copy these settings into nonvolatile flash memory. the flash update process requires a valid power supply level for the entire process time (see table 44). table 8 provides a memory map for the user registers, which includes a flash backup column. a yes in this column indicates that a register has a mirror location in flash and, when backed up properly, it automatically restores itself during startup or after a reset. figure 24 provides a diagram of the dual memory structure used to manage operation and store critical user settings. nonvolatile flash memory (no spi access) manual flash backup start-up reset volatile sram spi access 13390-016 figure 24. sram and flash memory diagram
ADIS16460 data sheet rev. 0 | page 12 of 26 user registers table 8 . user register memory map 1 name r/w flash backup address 2 default function bit assignments flash_cnt r yes 0x00 n/a flash memory write count see table 49 diag_stat r no 0x02 0x0000 diagnostic and operational status see table 43 x_gyro_low r no 0x04 n/a x - axis gyroscope output, lower word see table 10 x_gyro_out r no 0x06 n/a x - axis gyroscope output, upper word see table 11 y_gyro_low r no 0x08 n/a y - axis gyroscope output, lower word see table 12 y_gyro_out r no 0x0a n/a y - axis gyroscope output, upper word see table 13 z_gyro_low r no 0x0c n/a z - axis gyroscope output, lower word see table 14 z_gyro_out r no 0x0e n/a z - axis gyroscope output, upper word see table 15 x_accl_low r no 0x10 n/a x - axis accelerometer output, lower word see table 24 x_accl_out r no 0x12 n/a x - axis accelerometer output, upper word see table 25 y_accl_low r no 0x14 n/a y - axis accelerometer output, lower word see table 26 y_accl_out r no 0x16 n/a y - axis accelerometer output, upper word see table 27 z_accl_low r no 0x18 n/a z - axis accelerometer output, lower word see table 28 z_accl_out r no 0x1a n/a z - axis accelerometer output, upper word see table 29 smpl_cntr r no 0x1c n/a sample c ounter, msc_ctrl[3:2] = 11 see table 52 temp_out r no 0x1e n/a temperature (internal, not calibrated) see table 37 reserved n/a n/a 0x20, 0x22 n/a reserved, do not use n/a x_delt_ang r no 0x24 n/a x - axis delta angle output see table 18 y_delt_ang r no 0x26 n/a y - axis delta angle output see table 19 z_delt_ang r no 0x28 n/a z - axis delta angle output see table 20 x_delt_vel r no 0x2a n/a x - axis delta velocity see table 32 y_delt_vel r no 0x2c n/a y - axis delta velocity see table 33 z_delt_vel r no 0x2e n/a z - axis delta velocity see table 34 reserved n/a n/a 0x30 n/a reserved, do not use n/a msc_ctrl r/w yes 0x32 0x00c1 miscellaneous control see table 50 sync_scal r/w yes 0x34 0x7fff sync input scale control see tabl e 51 dec_rate r/w yes 0x36 0x0000 decimation rate control see table 53 fltr_ctrl r/w yes 0x38 0x0500 filter control, autonull record time see table 54 reserved n/a n/a 0x3a, 0x3c n/a reserved, do not use n/a glob_cmd w no 0x3e n/a global commands see table 44 x_gyro_off r/w yes 0x40 0x0000 x - axis gyroscope bias offset factor see table 55 y_gyro_off r/w yes 0x42 0x0000 y - axis gyroscope bias offset factor see table 56 z_gyro_off r/w yes 0x44 0x0000 z - axis gyroscope bias offset factor see table 57 x_accl_off r/w yes 0x46 0x0000 x - axis acceleration bias offset factor see table 58 y_accl_off r/w yes 0x48 0x0000 y - axis acceleration bias offset factor see table 59 z_accl_off r/w yes 0x4a 0x0000 z - axis acceleration bias offset factor see table 60 reserved n/a n/a 0x4c, 0x4e, 0x50 n/a reserved, do not use n/a lot_id1 r yes 0x52 n/a lot identification number 1 see table 39 lot_id2 r yes 0x54 n/a lot identification number 2 see table 40 prod_id r yes 0x56 0x404c product identifier see table 41 serial_num r yes 0x58 n/a lot specific serial number see table 42 cal_sgntr r n/a 0x60 n/a calibration memory signature value see table 46 cal_crc r n/a 0x62 n/a calibration memory crc values see table 48 code_sgntr r n/a 0x64 n/a code memory signature value see table 45 code_crc r n/a 0x66 n/a code memory crc values see table 47 1 n/a means not applicable. 2 each register contains two bytes. the address on display is for the lower byte. the address of the upper byte is equal to the address of the lower byte plus 1.
data sheet ADIS16460 rev. 0 | page 13 of 26 output data register s the output data registers contain inertial sensor (gyroscopes, accelerometers) measurements, delta angle calculations, delta velocity calculations, and a relative temperature monitor. r otation the ADIS16460 uses i mems gyroscopes to provide inertial rotation measurements around three orthogonal axes, in two different formats: angular rate and angular displacement ( delta - angles ) . figure 26 shows the a xial assignments and the direction of rotation that corresponds to a positive response in their respective output registers (see table 9 ) . angular rate data the angular rate of rotation data represents the calibrated response from the tri - axis mems gyroscope s. six registers provide real - time access to these measurements . eac h axis has two dedicated registers: a primary and a secondary register. table 9 provides the register assignments for each of the three axes ( x , y , z ) in figure 26. table 9 . angular rate of rotation data registers axis primary register secondary register x x_gyro_out (see table 11) x_gyro_low (see table 10) y y_gyro_out (see table 13) y_gyro_low (see table 12) z z_gyro_out (see table 15) z_gyro_low (see table 14) the primary register provides a 16- bit, twos complement n umber, where the scale factor (k g ) is equal to 0.005 /sec/lsb. the secondary register provides users with the ability to capture the bit growth that is associated with the summation functions in the user configurable digital filters ( see table 53 and table 54 ). figure 25 illustrates how the primary (x_g yr o_out) and secondary (x_g yr o_low) regis ters combine to provide a digital result that supports up to 32 bits of digital resolution for the angular rate of rotation around the x - axis . 13390-018 x -axis gyrosco p e data 0 15 15 0 x_gyro_out x_gyro_ l ow figure 25 . 32 - bit gyroscope data format table 10. x_gyro_low (base address = 0x04), read only bits description [15:0] x - axis, gyroscope, output data bit growth from x_gyro_out data path table 11. x _ gyro_out (base address = 0x06 ), read only bits description [15:0] x - axis, gyroscope output data, 0.005/sec/lsb (k g ) 0/sec = 0x0000, twos complement format table 12 . y_gyro_low (base address = 0x08), read only bits description [15:0] y - axis, gyroscope, output data bit growth from y_gyro_out data path table 13. y _ gyro_out (base address = 0x0 a ), read only bits description [15:0] y - axis, gyroscope output data, 0.005/sec/lsb (k g ) 0/sec = 0x0000, twos complement format table 14. z_gyro_low (base address = 0x0c), read only bits description [15:0] z - axis, gyroscope, output data bit growth from z_gyro_out data path table 15. z _ gyro_out (base address = 0x0 e ), read only bits description [15:0] z - axis, gyroscope output data, 0.005/sec/lsb (k g ) 0/sec = 0x0000, twos complement format 13390-017 y -axis y , ? y z , ? z x , ? x x-axis z-axis figure 26 . inertial sensor definitions
ADIS16460 data sheet rev. 0 | page 14 of 26 table 16 provides seven examples of the digital data format when using only the primary registers for 16 - bit measurements. table 16 . rotation rate, 16- bit example rotation rat e (/sec) decimal hex binary +100 20,000 0x4e20 0100 1110 0010 0000 +0.01 +2 0x0002 0000 0000 0000 0010 +0.005 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?0.005 ?1 0xffff 1111 1111 1111 1111 ?0.01 ?2 0xfffe 1111 1111 1111 1110 ?100 ?20,000 0xb1e0 1011 0001 1110 0000 many , if not all, applications do not require all 32 bits of digital resolution to preserve ke y sensor performance criteria. when truncating the data width to a lower number of bits, use the follow - ing formula to calcul ate the scale factor for the least significant bit : 16 2 1 lsb 1 ? = n g k r n is the total number of bits. for example, if the system uses four bits from the x_gyro_low registers, the data width is 20 bits and the lsb weight is equal to 0.0003215 /sec. 16 20 2 1 sec / 005 . 0 lsb 1 ? = = = table 17 . rotation rate, 20- bit example rotation rate (/sec) decimal hex binary +100 + 320,000 0x4e20 0 0100 1110 0010 0000 0000 + 0.000625 +2 0x 0 0002 0000 0000 0000 0000 0010 +0.00 03125 +1 0x 0 0001 0000 0000 0000 0000 0001 0 0 0x 0 0000 0000 0000 0000 0000 0000 ? 0.0003125 ?1 0x f ffff 1111 1111 1111 1111 1111 ? 0.000625 ?2 0x f fffe 1111 1111 1111 1111 1110 ?100 ?320,000 0xb1e0 0 1011 0001 1110 0000 0000 delta angle data the delta angle measurements (? x , ? y , ? x in figure 26 ) repre - sent the angular displacement around each axis, during each data processing cycle. three registers provide real - time access to these measure ments, with each axis (x, y, z) havi ng its own dedicated register. x_delt_ang (see table 18 ) is the output data r egister for the x - axis (? x in figure 26 ), y_delt _ ang (see table 19 ) is the output data register for the y - axis (? y in figure 26 ), and z_ delt _ ang (see table 20) is the output data register for the z - axis (? z in figure 26 ). the scale factors for these registers depend on the scale factor for the gyroscopes ( see table 11, k g = 0.005 /sec/lsb), sample clock (f sample ), related to msc_ctrl [3:2] ( see table 50) , and the decimation rate settings (dec_rate, see table 53) . table 18 . x_delt_ang (base address = 0x24), read only bits description [15:0] x - axis, delta angle output data 0 = 0x0000, twos complement format 1 lsb = k g (dec_rate + 1)/f sample (degrees) f sample = 2048 hz when msc_ctrl[ 3: 2] = 0 0 f sample is the external clock rate when msc_ctrl[ 3: 2] 00 table 19 . y_delt_ang (base address = 0x26), read only bits description [15:0] y - axis, delta angle output data 0 = 0x0000, twos complement format 1 lsb = k g (dec_rate + 1)/f sample (degrees) f sample =2048 hz when msc_ctrl[ 3: 2] = 0 0 f sample is the e xternal clock rate when msc_ctrl [3:2] 00 table 20. z_delt_ang (base address = 0x28), read only bits description [15:0] z - axis, delta angle output data 0 = 0x0000, twos complement format 1 lsb = k g (dec_rate + 1)/f sample (degrees) f sample = 2048 hz when msc_ctrl [3:2] = 00 f sample is the external clock rate when msc_ctrl [3:2] 00 table 21 illustrates the delta angle data format with numerical examples when msc_ctrl[ 3: 2] = 0 0 (f sample = 2048 hz) and dec_rate = 0x0000. table 21 . x_delt_ang data format , example 1 angle () 1 decimal hex binary +0.079998 +32,767 0x7fff 0111 1111 1111 1111 +0.0000048828 +2 0x0002 0000 0000 0000 0010 +0.0000024414 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?0.0000024414 ?1 0xffff 1111 1111 1111 1111 ?0.0000048828 ?2 0xfffe 1111 1111 1111 1110 ?0.080000 ? 32,768 0x8000 1000 0000 0000 0000 1 msc_ctrl[3:2] = 00, dec_rate = 0x0000 . table 22 illustrates the delta - angle data format with numerical examples when msc_ctrl[ 3: 2] = 0 1, the external clock (f sample ) is 2000 hz , and dec_rate = 0x0009. table 22 . x_de lt_ang data format , example 2 angle () 1 decimal hex binary +0.81918 +32,767 0x7fff 0111 1111 1111 1111 +0.000050 +2 0x0002 0000 0000 0000 0010 +0.000025 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ? 0.000025 ?1 0xffff 1111 1111 1111 1111 ?0.000050 ?2 0xfffe 1111 1111 1111 1110 ?0.81920 ?32,768 0x8000 1000 0000 0000 0000 1 msc_ctrl[3:2] = 01, dec_rate = 0x0009, f sample = 2000 hz .
data sheet ADIS16460 rev. 0 | page 15 of 26 a ccelerometers the ADIS16460 uses i mems accelerometers to provide linear inertial measurements along three orthogonal axes, in two different formats: linear acceleration and delta velocity. figure 28 shows the axial assignments , the direction of linear acceleration that corresponds to a positive response in their respective output registers (see table 9 ) . linear acceleration the linear acceleration measurements represent the calibrated response from the tri - axis mems accelerometers . six registers provide real - time access to these measurements . each axis has two dedicated registers: a primary register and a secondary register . table 23 provides the register assignments for each of the three axes (a x , a y , a x ) in figure 28. table 23 . linear acceleration data registers axis primary register secondary register a x x_accl_out (see table 25) x_accl_low (see table 24) a y y_accl_out (see table 27 ) y_accl_low (see table 26 ) a z z_accl_out (see table 29) z_accl_low (see table 28) the primary register provides a 16- bit, twos complement number, where the scale factor (k a ) is equal 0.25 m g /lsb. the secondary register provides users with the ability to capture the bit g rowth that is associated with the summation functions in the user configurable digital filters ( see table 53 and table 54 ). fi gure 27 illustrates how the primary (x_ accl _out) and secondary (x_ accl _low) registers combine to provide a digital result that supports up to 32 bits of digital resolution for linear acceleration along the x - axis. 13390-020 x -axis accelerometer data 0 15 15 0 x_accl_out x_accl_ l ow fi gure 27 . 32 - bit accelerometer data format table 24 . x_accl_low (base address = 0x10) read only bits description [15:0] x - axis, accelerometer, output data bit growth from x_accl_out data path table 25 . x_accl_out (base address = 0x12), read only bits description [15:0] x - axis, accelerometer output data, 0.25 m g /lsb (k a ) 0 m g = 0x0000, twos complement format table 26. y_accl_low (base address = 0x14), read only bits description [15:0] y - axis, accelerometer, output data bit growth from y_accl_out data path table 27 . y_accl_out (base address = 0x16), read only bits description [15:0] y - axis, accelerometer output data, 0.25 m g /lsb (k a ) 0 m g = 0x0000, twos complement format table 28 . z_accl_low (base address = 0x18), read only bits description [15:0] z - axis, accelerometer, output data bit growth from z_accl_out data path table 29 . z_ accl _out (base address = 0x 1a ), read only bits description [15:0] z - axis, accelerometer output data, 0.25 m g /lsb (k a ) 0 m g = 0x0000, twos complement format 13390-019 y -axis a y , v y a z , v z a x , v x x-axis z-axis figure 28 . inertial sensor definitions
ADIS16460 data sheet rev. 0 | page 16 of 26 table 30 provides seven examples of the digital data format when using only the primary registers for 16-bit measurements. table 30. acceleration, twos complement format acceleration (m g ) decimal hex binary +5000 20,000 0x4e20 0100 1110 0010 0000 +0.5 +2 0x0002 0000 0000 0000 0010 +0.25 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?0.25 ?1 0xffff 1111 1111 1111 1111 ?0.5 ?2 0xfffe 1111 1111 1111 1110 ?5000 ?20,000 0xb1e0 1011 0001 1110 0000 many, if not all, applications do not require all 32 bits of digital resolution to preserve key sensor performance criteria. when truncating the data width to a lower number of bits, use the follow- ing formula to calculate the scale factor for the least significant bit: 16 2 1 lsb1 ? ?? n a k where n is the total number of bits. for example, if the system uses two bits from the x_accl_low registers, the data width is18 bits and the lsb weight is equal to 0.0625 m g . 1618 2 1 m25.0lsb1 ? ?? g g g m0625.0 4 1 m25.0lsb1 ??? table 31 provides seven examples of the digital data format when using the primary and secondary registers to produce an 18-bit number for the angular rate of rotation. table 31. acceleration, 18-bit example acceleration (m g ) decimal hex binary +5000 80,000 0x13880 01 0011 1000 1000 0000 +0.125 +2 0x00002 00 0000 0000 0000 0010 +0.0625 +1 0x00001 00 0000 0000 0000 0001 0 0 0x00000 00 0000 0000 0000 0000 ?0.0625 ?1 0x3ffff 11 1111 1111 1111 1111 ?0.125 ?2 0x3fffe 11 1111 1111 1111 1110 ?5000 ?80,000 0x2c780 10 1100 0111 1000 0000 delta velocity data the delta velocity measurements (v x , v y , v x in figure 28) represent the change in velocity along each axis, during each data processing cycle. three registers provide real-time access to these measurements, with each axis (x, y, z) having its own dedicated register. x_delt_vel (see table 32) is the output data register for the x-axis (v x in figure 28), y_ delt_vel (see table 33) is the output data register for the y-axis (v y in figure 28), and z_delt_vel (see table 34) is the output data register for the z-axis (v z in figure 28). the scale factors for these registers depend on the scale factor for the accelerometers (see table 25, k a = 0.25 m g /sec/lsb), sample clock (f sample ) related to msc_ctrl[3:2] (see table 50), and the decimation rate settings (dec_rate, see table 53). table 32. x_delt_vel (base address = 0x2a), read only bits description [15:0] x-axis, delta velocity output data 0 = 0x0000, twos complement format 1 lsb = k a 10 (dec_rate + 1)/f sample (mm/sec) f sample = 2048 hz when msc_ctrl[3:2] = 00 f sample is the external clock rate when msc_ctrl[3:2] 00 table 33. y_delt_vel (base address = 0x2c), read only bits description [15:0] y-axis, delta velocity output data 0 = 0x0000, twos complement format 1 lsb = k a 10 (dec_rate + 1)/f sample (mm/sec) f sample = 2048 hz when msc_ctrl[3:2] = 00 f sample is the external clock rate when msc_ctrl[3:2] 00 table 34. z_delt_vel (base address = 0x2e), read only bits description [15:0] z-axis, delta velocity output data 0 = 0x0000, twos complement format 1 lsb = k a 10 (dec_rate + 1)/f sample (mm/sec) f sample =2048 hz when msc_ctrl[3:2] = 00 f sample is the external clock rate when msc_ctrl[3:2] 00 table 35 illustrates the delta velocity data format with numerical examples when msc_ctrl[3:2] = 00 (f sample = 2048 hz) and dec_rate = 0x0000. table 35. x_delt_vel data format, example 1 velocity (mm/sec) decimal hex binary +39.999 +32,767 0x7fff 0111 1111 1111 1111 +0.0024414 +2 0x0002 0000 0000 0000 0010 +0.0012207 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ?0.0012207 ?1 0xffff 1111 1111 1111 1111 ?0.0024414 ?2 0xfffe 1111 1111 1111 1110 ?40 ?32,768 0x8000 1000 0000 0000 0000 1 msc_ctrl[3:2] = 00, dec_rate = 0x0000.
data sheet ADIS16460 rev. 0 | page 17 of 26 table 36 illustrates the delta velocity data f ormat with numerical examples when msc_ctr l [3:2] = 01 , the external clock (f sample ) is 2000 hz and dec_rate = 0x0009. table 36. x_delt_vel data format , example 2 velocity (mm/sec) decimal hex binary + 409.59 +32,767 0x7fff 0111 1111 1111 1111 + 0.02 50 +2 0x0002 0000 0000 0000 0010 + 0.012 5 +1 0x0001 0000 0000 0000 0001 0 0 0x0000 0000 0000 0000 0000 ? 0.012 5 ?1 0xffff 1111 1111 1111 1111 ? 0.02 50 ?2 0xfffe 1111 1111 1111 1110 ? 409.6 ?32,768 0x8000 1000 0000 0000 0000 1 msc_ctrl[3:2] = 01, dec_rate = 0x0009, f sample = 2000 hz . internal temperature the internal temperature measurement data loads into the temp_ out register (see table 37) . table 38 illustrates the temperatu re data format. n ote that this temperature repre sents an internal temperature reading, which does not precisely represent external conditions. the intended use of temp_out is to monitor relative changes in temperature. table 37 . te mp_out (base address = 0x1e), read only bits description [15:0] twos complement, 0.05c/lsb, 25c = 0x0000 table 38 . temperature, twos complement format temp erature ( c ) decimal hex binary +105 +1600 0x0640 0000 0110 0100 0000 +85 +1200 0x04b0 0000 0100 1011 0000 +25.1 +2 0x0002 0000 0000 0000 0010 +25.05 +1 0x0001 0000 0000 0000 0001 +25 0 0x0000 0000 0000 0000 0000 +24.95 ? 1 0xffff 1111 1111 1111 1111 +24.90 ?2 0xfffe 1111 1111 1111 1110 ?40 ? 1300 0xfaec 1111 1010 1110 1100 product identificati on the prod_id register contains the binary equivalent of 16,460 (see table 41) . it provides a product specific variable for systems that need to track this in their system software. the lot_id1 and lot_id2 registers, respectively, combine to provide a unique, 32- bit lo t identification code (see table 39 and table 40) . the serial_num register contains a binary number that represents the serial number on the device label (see table 42) . the assigned serial numbers in serial_num are lot specific. table 39 . lot_id1 (base address = 0x52), read only bits description [15:0] lot identification, binary code table 40 . lot_id2 (base address = 0x54), read only bits description [15:0] lot identification, binary code table 41 . prod_id (base address = 0x56), read only bits description (default = 0x404c) [15:0] product identification = 0x404c (16,460) table 42 . serial_num (base address = 0x58), read only bits description [15:12] reserved, values can vary [11:0] serial number, 1 to 4094 (0xffe) s tatus /e rror f lags the diag_stat register in table 43 contains various bits that serve as error flags for fl ash update, communication, over range, self test , and memory i ntegrity. reading this register provides access to the status of each flag and resets all bits to zero for monitoring future operation. if the error condition remains, the error flag return s to 1 at the conclusion of the next sample cycle. table 43 . diag_stat (base address = 0x 02 ), read only bits description (default = 0x0000) [15: 8] not used, always zero [9:8] reserved, values can vary ( n ot always zero) 7 input clock out of sync 1 = fail, 0 = pass 6 flash memory test 1 = fail, 0 = pass 5 self test diagnostic error flag 1 = fail, 0 = pass 4 sensor overrange 1 = overrange, 0 = normal 3 spi communication failure 1 = fail, 0 = pass 2 flash update failure 1 = fail, 0 = pass [1:0] not used , always zero manual flash update setting glob_cmd[ 3 ] = 1 (din = 0xbe 08 , see table 44 ) trigger s a manual flash update (mfu) routine , which copies the user register settings into manual flash memory , which provides a non volatile backup that loads into the registers during the reset or power - on process. after this routine completes, diag_stat[2] contains the pass/fail result . when this bit is set in an error state (equal to 1), trigger another mfu and check diag_stat [2] again after the mfu completes . if this flag remains at zero , it indicates that the latest attempt was completed and that no further action is necessary. persistence in this error flag can indicate a failure in the flash memory.
ADIS16460 data sheet rev. 0 | page 18 of 26 spi communication failure this flag (diag_stat[3]) indicates that the total number of sclk pulses was not equal to an integer multiple of 16 , while the chip select ( cs ) line was low . this flag can be an indication of communication failure ; therefore, it can trigger a process of repeating previous commands or a validation of data integrity. sensor ove r range this error flag (diag_stat[4]) indicates that one of the inertial sensors has experienced a condition that exceeds its measurement range. self test failure the diag_stat[5] bit provides the result from the a utomated sel f test function, which is associated with glob_cmd[2] ( see table 44 ). when this bit is set in an error state (equal to 1), trigger another automated self test (ast) and check diag_stat[5] again after the ast completes. if this flag remains at zero, it indicates that the latest attempt was completed and that no further action is necessary. persistence in this error flag can indicate a failure in one or more of the inertial sensors. flash t est failure diag_stat[6] ( see table 43 ) contains the result of the memory test, which executes after setting glob_cmd[4] = 1 (din = 0xbe10 , see table 44). input clock sync failure this error flag (diag_stat[7] = 1) indicates that the sync_ scal value is not a ppropriate for the frequency of the signal on the sync pin.
data sheet ADIS16460 rev. 0 | page 19 of 26 s ystem f unctions global commands the glob_cmd register provides trigger bits for a number of global commands. to start any of these routines, set the appropri - ate bit equal to 1 and then wait for the execution time ( see table 44 ) before initiating any further communication on the s pi port. table 44 . glob_cmd (base address = 0x 3e ), write o nly bits description execution time ( max ) [15:8] not used n ot applicable 7 software reset 610 ms [6:5] not used not applicable 4 flash memory test 36 3 manual f lash update 70 2 automated s elf test (ast) 7 1 factory calibration restore 75 ms 0 gyroscope bias correction 1 output data cycle 1 1 dec_rate ( s ee table 53 ) and msc_ctrl[3:2] ( s ee table 50 ) establish this time . s oftware r eset the glob_cmd reg ister provides an opportunity to initiate a processor reset by setting glob_cmd[7] = 1 (din = 0x be80). f lash m emory t est the factory configuration of the ADIS16460 includes performing a cyclical redundancy check (crc) , using the ieee - 802.3 crc32 ethernet s tandard method, on the program code and calibra - tion memory banks. this process establishes signature values for th ese two memory banks and programs them into the follow - ing registers: c ode_sgntr ( see table 45 ) and cal_sgntr ( see table 46) . table 45 . code_sg n tr (base address = 0x64), read only bits description [15:0] program code signature value , constant table 46. cal_sngtr (base address = 0x60), read only bits description [15:0] calibration signature value, constant the glob_cmd register provides an opportunity to initiate a flash memory test at any time by setting glob_cmd[4] = 1 (din = 0xbe10, see table 44). this test performs the same crc process on the program code and calibration memory banks and then writes the results into the following reg isters: code_crc ( see table 47 ) and cal_crc ( see table 48 ). at the conclusion of this test, the pass/fail result load s into diag_stat[6] ( see table 43 ), with the passing result (diag_stat[6] = 0) requiring the following conditions: ? code_crc = code_sngtr ? cal_crc = cal_sgntr table 47. code_crc (base address = 0x66), read only bits description [15:0] program c ode crc, updates continuously table 48 . cal_crc (base address = 0x62), read only bits description [15:0] calibration crc v alue, updates continuously m anual f lash u pdate the glob_cmd register provides an opportunity to store user configuration values in nonvolatile flash by setting glob_ cmd[3] = 1 (din = 0x be08, also see figure 24 ). the flash_ cnt register ( see table 49) provides a running count of the number of flash updates to help users manage the endurance ratings ( see table 1 ). n ote that initiating the commands in glob_ cmd[ 0] and glob_cmd[1] ( see table 44 ) also include s a flash memory update , which results in an incremental count increase in the flash_cnt register. table 49 . flash_cnt (base address = 0x00), read only bits description [15:0] binary counter a utomated s elf t est each inertia l sensor in the ADIS16460 has a self test function that applies an electrostatic force to its physical elements, which causes them to move in a manner that simulates their response to rotational (gyroscope) and linear (accelerometer) motion. this movement causes a predictable, observable resp onse on the output of each sensor , which provides an opportunity to verify basic functionality of each sensor and their associated signal chain. the glob_cmd register provides an opportunity to initiate an automated process that uses this sensor level feature to verify that each sensor is in working order. set glob_cmd[2] = 1 (din = 0xbe04, see table 44 ) to trigger this ast function, which stops norm al data production, exercises the self test function of each sensor, compares their responses to the range of normal responses , and then restores normal data sampling. after this routine completes, the diag_stat[5] ( see table 43) contains the pass/fail result. i nput /o utput c onfiguration the ADIS16460 provides two pins, sync and dr, that manage sampling and data collection (see figure 5 ) . the msc_ctrl register provides several bits for configuring these pins (see table 50) . data ready ( dr ) p in c onfiguration t he dr pin provides a data ready signal that indicates when new data is available in the output registers , which helps minimize processing latency and avo id data collision (see figure 5 ) . figure 17 shows an example, where this pin connects to an interrupt request (irq) pin on the system processor. use msc_ctrl[0] ( see table 50) to establish a pol arity so that system level interrupt service routines (isr) can trigger on the appropriate edge of this signal. for example, figure 4 illustrates an ex ample where msc_ctr l [0] = 1, which work s well with
ADIS16460 data sheet rev. 0 | page 20 of 26 irq pins that trigger on the positive edge of a pulse. when dr is driving an irq pin that triggers on the negative edge of a signal, set din = 0xb2c 3 (msc_ctrl[7:0] = 0xc 3 ) . this code also preserve s the factory default configura tion for the l inear g c ompensation (msc_ctrl[7]) and point of percussion (msc_ ctrl[6]) . note that the data ready signal stop s while the device executes the global commands associated with the glob_cmd register (see table 44) . sync p in c onfiguration msc_ctrl[3:2] ( see table 50) provides user configurable controls for selecting one of four modes that the sync pin/ function ( see figure 5 ) support s : internal sample clock, external sync (direct sample control), precision input sync with data counter , and sample time indicator. msc_ctrl[1] establishes the polarity for the active state of the sync pin, regardless of the mode it is operating in. table 50 . msc_ctrl (base address = 0x3 2 ), read/write bits description (default = 0x00 c1 ) [15:7] not used 7 linear -g compensation control 1 = enabled 0 = disabled (no linear -g compensation) 6 point of percussion, see figure 32 1 = enabled 0 = disabled (no point of percussion alignment) [ 5 :4] not used , always set to zero [ 3 :2] sync function setting 11 = sample time indicator (output) 10 = precision input sync with data counter 01 = direct sample control (input) 00 = disabled (internal sample clock) 1 sync polarity (input or output) 1 = rising edge triggers sampling 0 = falling edge triggers sampling 0 dr polarity 1 = active high when data is valid 0 = active low when data is valid sample time indicator when msc_ctrl[3:2] = 11 ( see table 50 ), the ADIS16460 sample d and process es data using its internal sample clock (2048 sps) and the sync pin provide s a pulsi ng signal, whose leading edge indicates the sample time of the inertial sensors . set din = 0xb2cd to configure the ADIS16460 for this mode, while preserving the rest of the default settings in the msc_ctrl register. precision input sync with data counter when msc_ctrl[3:2] = 10 ( see table 50 ), the update rate in the output registers is equal to the product of the input clock frequency (f sync ) and the scale factor (h ss ) in the sync_scal ( see tabl e 51 ) register. this mode provides support for slower input clock references, such as the pulse per second (pps) from some global positioning systems (gps) or some video synchroniz - ing s ignals. set din = 0xb2c9 to configure the ADIS16460 for this mode, while preserving the rest of the default settings in the msc_ctrl register. when in this mode, u se the following formula to calculate the scale factor (h ss ) value to write into the sync_scal register: ? ? ? ? ? ? ? ? ? = 1 768 , 32 floor sync ss f h or l ig h io igl h ss l o syncsca 22 ig dn b 2 b 2 ( ) 545 13333 . 545 floor 1 60 768 , 32 = = ? ? ? ? ? ? ? = floor h ss ig h s igl fl l of i rgir or i o f syncsca o o i fl o syncsca ig dn b b ( ) 767 , 32 767 , 32 floor 1 1 32,768 floor = = ? ? ? ? ? ? ? = ss h r o r o folloig rlioi liig oil l for f sync h h ss f sync 2048 when operating outside of this con dition, the input control loop for the data sampling can lose its lock on the input frequency. diag_stat[7] = 1 ( see table 43 ) provides an indication of this condition, where the input sync signal is no longer influencing the sample times. tabl e 51 . sync_sc a l (base address = 0x34), read/write bits description (default = 0x 7fff ) 15 not used [14:0] input sync scale factor, h ss , when msc_ctrl[3:2] = 10 . binary format, r ange = 255 to 32 , 767. when msc_ctrl[3:2] = 10, the smpl_cntr register provide s a total number of counts that occurs after each input clock pulse using a rate of 24576 hz. the smpl_cntr register resets to 0x0000 with the leading edge of each sync input signal. table 52. smpl_cntr (base address = 0x 1c ), read/write bits description [1 5 :0] data counter for the number of samples since the last input clock pulse, binary format, 0x0000 = 0 s, 40.69 s/lsb , e ach i nput clock pulse resets this value to 0x0000 direct sample control when msc_ctrl[3:2] = 01 ( see table 50 ), the clock signal on the sync pin control s the update rate in the output registers. set din = 0xb2c5 to configure the ADIS16460 for this mode, while preserving the rest of the default settings in the msc_ctrl register.
data sheet ADIS16460 rev. 0 | page 21 of 26 d igital processing config uration gyroscopes/accelerom eters figure 30 provides a diagram that describes the entire signal processing f or the gyroscopes and accelerometers. when using the internal sample clock, (msc_ctrl [3:2] = 00, see table 50) , t he internal sampling system produces n ew data at a rate of 2048 sps . the dec_rate register ( see table 53 ) provides a user configura - ble input, which controls the decimation rate for the updat e rate in the output registers. for example, set dec _ rate = 0x 00 0 9 (din = 0xb 6 0 9 , then din = 0xb700 ) to s et the decimation factor to 1 0 . this setting reduces the update rate to 204.8 sps and affects the update rate in the gyroscope, accelerometer , and temperature output registers. table 53. dec_rate (base address = 0x3 6 ), read/write bits description (default = 0x000 0 ) [15: 11 ] not used, always zero [ 10 :0] d, decimation rate setting, linear , see figure 30 digital filtering the fltr_ctrl register (see table 54) provides user controls for t he digital low - pass filter. this filter contains two cascaded averaging filters that provide a bartlett window, fir filter response (see figure 29 ). for example, set flt r _ctrl [2:0] = 100 (din = 0xb 8 04) to set each stage to 16 taps. when used with the default sample rate of 2048 sps and zero decimation dec _ rate = 0x00 ) , this value reduces the sensor bandwidth to approximately 41 hz. 0 ?20 ?40 ?60 ?80 ?100 ?120 ?140 0.001 0.01 0.1 1 magnitude (db) frequenc y ( f / f s ) n = 2 n = 4 n = 16 n = 64 13390-021 figure 29 . bartlett window, fir filter frequency response (phase delay = n samples) table 54. fltr_ctrl (base address = 0x 3 8 ), read/write bits description (default = 0x0 500 ) [15: 9 ] reserved [10:8] sensor bias estimation time factor (nbe) setting range = 0 to 6 estimation time = (1/2048) 2 (nbe + 11) (seconds) [7:3] reserved [2:0] filter s ize v ariable b , s etting range = 0 to 6 number of taps in each stage; n b = 2 b see figure 29 for the filter response mems sensor lo w -p ass fi l ter clock 2048sps adc bartlett window fir fi l ter a verage/ decim a tion fi l ter b = fi l t_ctrl[2:0] n b = 2 b n b = number of t aps (per s t age) n d = dec_r a te + 1 n d x(n) n = 1 1 n b n b x(n) n = 1 1 n b n b x(n) n = 1 1 n d n d 13390-022 figure 30 . sensor sampling and frequency response block diagram
ADIS16460 data sheet rev. 0 | page 22 of 26 calibration the mechanical structure and assembly process of the ADIS16460 provide excellent position and alignment stability for each sensor, even after subjected to temperature cycles, shock, vibration, and other environmental conditions. the factory calibration includes a dynamic characterization of each gyroscope and accelerometer over temperature, and generates sensor specific correction formulas. gyroscopes the x_gyro_off (see table 55), y_gyro_off (see table 56), and z_gyro_off (see table 57) registers provide user- programmable bias adjustment function for the x-axis, y-axis, and z-axis gyroscopes, respectively. figure 31 illustrates that the bias correction factors in each of these registers has a direct impact on the data in output registers of each sensor. x_gyro_off x_accl_off mems sensor adc factory calibration and filtering x_gyro_out x_accl_out 13390-023 figure 31. user calibration, gyroscopes, and accelerometers table 55. x_gyro_off (base address = 0x40), read/write bits description (default = 0x0000) [15:0] x-axis, gyroscope offset correction factor, twos complement, 1 lsb = 0.000625/sec, 0/sec = 0x0000 table 56. y_gyro_off (base address = 0x42), read/write bits description (default = 0x0000) [15:0] y-axis, gyroscope offset correction factor, twos complement, 1 lsb = 0.000625/sec, 0/sec = 0x0000 table 57. z_gyro_off (base address = 0x44), read/write bits description (default = 0x0000) [15:0] z-axis, gyroscope offset correction factor, twos complement, 1 lsb = 0.000625/sec, 0/sec = 0x0000 gyroscope bias error estimation any system level calibration function must start with an estimate of the bias errors. estimating the bias error typically involves collecting and averaging a time record of gyroscope data while the ADIS16460 is operating through static inertial conditions. the length of the time record associated with this estimate depends on the accuracy goals. the allan variance relationship (see figure 7) provides a trade-off relationship between the averaging time and the expected accuracy of a bias measurement. vibration, thermal gradients, and power supply instability can influence the accuracy of this process. gyroscope bias correction factors when the bias estimate is complete, multiply the estimate by ?1 to change its polarity, convert it into digital format for the offset correction registers (see table 55, table 56, and table 57), and write the correction factors to the correction registers. for example, lower the x-axis bias by 10 lsb (0.00625/sec) by setting x_gyro_off = 0xfff6 (din = 0xc1ff, 0xc0f6). single command bias correction setting glob_cmd[0] = 1 (din = 0xbe01, see table 44) causes the ADIS16460 to automatically load the x_gyro_off, y_gryo_off, and z_gyro_off registers with the values from a backward looking, continuous bias estimator (cbe). the record length/time for the cbe is associated with the fltr_ctrl[10:8] bits (see table 54). the accuracy of this estimate relies on ensuring no rotational motion during the estimation time in fltr_ctrl[10:8]. accelerometers the x_accl_off (see table 58), y_accl_off (see table 59), and z_accl_off (see table 60) registers provide user programmable bias adjustment function for the x-axis, y-axis, and z-axis accelerometers, respectively. figure 31 illustrates that the bias correction factors in each of these registers has a direct impact on the data in each sensors output registers. table 58. x_accl_off (base address = 0x46), read/write bits description (default = 0x0000) [15:0] x-axis, accelerometer offset correction factor, twos complement, 0.03125 m g /lsb, 0 g = 0x0000 table 59. y_accl_off (base address = 0x48), read/write bits description (default = 0x0000) [15:14] not used [13:0] y-axis, accelerometer offset correction factor, twos complement, 0.03125 m g /lsb, 0 g = 0x0000 table 60. z_accl_off (base address = 0x4a), read/write bits description (default = 0x0000) [15:14] not used [13:0] z-axis, accelerometer offset correction factor, twos complement, 0.03125 m g /lsb, 0 g = 0x0000 accelerometer bias error estimation under static conditions, orient each accelerometer in positions where the response to gravity is predictable. a common approach is to measure the response of each accelerometer when they are oriented in peak response positions, that is, where 1 g is the ideal measurement position. next, average the +1 g and ?1 g accelerometer measurements together to estimate the residual bias error. using more points in the rotation can improve the accuracy of the response. accelerometer bias correction factors when the bias estimate is complete, multiply the estimate by ?1 to change its polarity, convert it to the digital format for the offset correction registers (see table 58, table 59, or table 60), and write the correction factors to the correction registers. for example, lower the y-axis bias by 12 lsb (0.375 m g ) by setting y_accl_off = 0xfff4 (din = 0xc7ff, 0xc6f4).
data sheet ADIS16460 rev. 0 | page 23 of 26 point of percussion alignment set msc_ctrl[6] = 1 (din = 0xb 2 c 1, see table 50 ) to enable this feature and maintain the factory default settings for the dr and sync pins . this feature performs a point of percussion translation to the point identified in figure 32. see table 50 for more information on msc_ctrl. poi n t o f percu ssio n a l ig n me n t r ef er enc e poi nt see msc_ctrl[6] 13390-024 figure 32 . point of percussion physical reference restoring factory ca libration set glob_cmd[1] = 1 (din = 0x be 02, see table 44 ) to execute the facto ry calibration restore function , which resets the gyroscope and accelerometer offset register s to 0x 0000 and all sensor data to 0 . th is process concludes by automatically updat ing the flash memory and then returns to normal data sampling and processing.
ADIS16460 data sheet rev. 0 | page 24 of 26 applications informa tion m ounting t ips the ADIS16460 package support s installation onto a pri nted circuit board (pcb) or rigid enclosure, using three m2 or 2 - 56 machine screws , using a torque that is between 20 inch ounces and 40 inch ounces . when designing a mechanical interface for the ADIS16460 , avoid placing unnecessary translational stress on the electrical connector because it can influence the bias repeatability behaviors of the inertial sensors. when the same pcb also has the mating connector, the use of pass through holes for the mounting screws may be required . figure 33 shows a detailed view o f the pcb pad design when using one of the connector variants in the clm - 107- 02 family . 0 . 236 4 [6 . 0 ] 0.0240 [0.610] 0.019685 [0.5000] (typ) 0.054 [1.37] 0.0394 [1.00] 0.0394 [1.00] 0.1800 [4.57] nonplated through hole 2 0.022 dia (typ) 0 . 0 03 0.000 0.022 dia through hole (typ) nonplated through hole 13390-026 figure 33 . mating connector design detail power s upp ly c onsiderations during startup, the internal power conversion system start s drawing current when vdd reaches 1.6 v. the internal processor begin s initializing when vdd is equal to 2.35 v. after the processor starts, vdd must reach 2.7 v within 128 ms . al so, make sure that the power supply drops below 1.6 v to ensure that the internal processor shut s down. use at least 10 f of capacitance across vdd and gnd. best results come from using high quality, multi layer ceramic capacitors, located as close to the ADIS16460 connector as is practical. using this capacitor supports optimal noise performance in the sensors. b reakout board the adis16imu4/pcbz breakout board provides a ribbon cable interface for simple connection to an embedded processor development system . figure 34 shows the electrical schematic , and figure 35 shows a top view for this breakout board. j2 mates directly to the electrical connector on the ADIS16460 , and j1 easily mates to a 1 mm ribbon cable system. 13390-027 c1 0805 10f c2 0603 1f 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 j2 j1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 dr sync sclk dout din cs dnc rst dnc dnc vdd dnc gnd dnc figure 34 . adis16imu4/pcbz electrical schematic 13390-028 figure 35 . adis16imu4/pcbz top view 13390-029 1 rst 2 j1 3 cs 4 dout sclk 5 dnc 6 din 7 gnd 8 gnd 9 gnd 10 vdd 1 1 vdd 12 vdd 13 dr 14 sync 15 nc 16 nc figure 36 . adis16iumu4/pcbz j1 pin assignments
data sheet ADIS16460 rev. 0 | page 25 of 26 pc-based evaluation tools the adis16imu4/pcbz provides a simple way to connect the ADIS16460 to the eval-adis evaluation system, which provides a pc-based method for evaluation of basic function and performance. for more information, visit the following wiki guide: adis1646x evaluation on a pc . estimating the number of relevant bits the primary output data registers provide 16 bits of resolution for each of the inertial sensors, which is sufficient for preserving key sensor behaviors when the internal filters are not in use and when collecting every sample that the ADIS16460 loads into its output registers. for systems that use the internal filtering, the secondary output data registers capture the bit growth that comes from the accumulation functions in these filters. the magnitude of this bit growth depends on the settings in both of these registers. use the variable settings (d in table 53, b in table 54) and the following formula to calculate the total number of summation functions (ns), along with the associated bit growth in the data path (n bg ): ns = d + 2 b n bg = ns for example, if b = 5 and d = 4, the bit growth in the internal data path is six bits, which means that only the upper six bits of each secondary register (x_gyro_low[15:10], for example) have relevance. ns = d + 2 b = 4 + 2 5 = 36 samples n bg = ns = 36 = 6 bits the stability performance of each sensor is worth consideration as well, when determining the number of bits to carry through- out the data path in a system processor. for example, preserving the six most significant bits in the secondary registers for the gyroscopes provides a digital resolution of 0.000078125/sec, or ~0.28/hour, which is significantly lower than the in-run bias stability of the ADIS16460 gyroscopes.
ADIS16460 data sheet rev. 0 | page 26 of 26 outline dimensions 12-15-2015-a bottom view end view 11.20 bsc 4.10 bsc 1.15 bsc 7.10 bsc 7.10 bsc 3.00 bsc 4.10 bsc ? 22.68 22.40 22.12 22.68 22.40 22.12 1.35 r 1.25 1.15 2.70 2.50 2.30 ( 2 plcs) 9.30 9.00 8.70 figure 37 . 14 - lead module with connector interface [module] (ml - 14 - 5) dimensions shown in millimeters ordering guide model 1 temperature range package description package option ADIS16460amlz ?2 5 c to +85c 14- lead module with connector interface [module] ml -14 -5 1 z = rohs compliant part. ? 2016 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d13390 - 0 - 1/16(0)

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